| 000 | 01758cam a2200361 a 4500 | ||
|---|---|---|---|
| 001 | 30112 | ||
| 005 | 20230423231335.0 | ||
| 008 | 131009s2013 nyua 001 0 eng | ||
| 020 | _a9780073529530 (hbk. : alk. paper) | ||
| 020 | _a0073529532 (hbk. : alk. paper) | ||
| 020 | _a9780071287654 (pbk.) | ||
| 020 | _a0071287655 (pbk.) | ||
| 049 | _bPITLIB | ||
| 050 | 0 | 0 |
_aTK7888.4 _b.B879 2009 |
| 100 | 1 |
_aBrown, Stephen D. _939246 |
|
| 245 | 1 | 0 |
_aFundamentals of digital logic with VHDL design / _cStephen Brown and Zvonko Vranesic _h[book] |
| 250 | _a3rd ed. | ||
| 260 |
_aNew York, NY : _bMcGraw-Hill, _cc2009. _92033 |
||
| 300 |
_axx, 939 p. : _bill. (some col.) ;+ _e1 CD-ROM (4 3/4 in.) |
||
| 440 | 0 |
_aMcGraw-Hill series in electrical and computer engineering _939247 |
|
| 500 | _aIncludes index | ||
| 500 | _aAccompanying CD-ROM contains Altera's Quartus II CAD system and all VHDL examples presented in the book. | ||
| 538 | _aMinimum system requirements (PC): Pentium III processor or later; Windows XP or later; USB port for connecting a USB-Blaster; TCP/IP networking protocol installed; Internet Explorer 6.0 or later | ||
| 650 | 0 |
_aLogic circuits _xData processing _xData processing _938806 |
|
| 650 | 0 |
_aLogic design _xData processing _938807 |
|
| 650 | 0 |
_aVHDL (Computer hardware description language) _938818 |
|
| 690 | 0 |
_a0021 วิทยาศาสตร์บัณฑิต สาขาเทคโนโลยีสารสนเทศ IT (ป.ตรี) _964 |
|
| 690 | 0 |
_a0022 วิศวกรรมศาสตรบัณฑิต สาขาวิศวกรรมอุตสาหการ IE (ป.ตรี) _949 |
|
| 700 | 1 |
_aVranesic, Zvonko G. _939248 |
|
| 942 | _cBK | ||
| 988 | _c30112 | ||
| 999 |
_c30112 _d30112 |
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