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| 005 | 20230423231327.0 | ||
| 008 | 130803s2013 maua b 001 0 eng | ||
| 020 | _a9780136019282 (alk. paper) | ||
| 020 | _a0136019285 (alk. paper) | ||
| 020 | _a0130891614 (alk. paper) | ||
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| 049 | _bPITLIB | ||
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_aTK7885.7 _b.C572 2011 |
| 100 | 1 |
_aCiletti, Michael D. _938808 |
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| 245 | 1 | 0 |
_aAdvanced digital design with the Verilog HDL / _cMichael D. Ciletti _h[book] |
| 250 | _a2nd ed. | ||
| 260 |
_aBoston : _bPrentice Hall, _cc2011. _92211 |
||
| 300 |
_axviii, 965 p. : _bill. |
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| 449 | 0 | _a•v004– New Arrivals- Sep. 2013 | |
| 490 | 0 | _aPrentice Hall Xilinx design series | |
| 504 | _aIncludes bibliographical references and indexes | ||
| 650 | 0 |
_aLogic design _xData processing _938807 |
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| 650 | 0 |
_aVerilog (Computer hardware description language) _938809 |
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| 690 | 0 |
_a0021 วิทยาศาสตร์บัณฑิต สาขาเทคโนโลยีสารสนเทศ IT (ป.ตรี) _964 |
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| 690 | 0 |
_a0023 วิศวกรรมศาสตรบัณฑิต สาขาวิศวกรรมคอมพิวเตอร์ CPE (ป.ตรี) _965 |
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