รายละเอียดในรูปแบบ MARC
| 000 -LEADER |
|---|
| fixed length control field |
02004nam a2200433 a 4500 |
| 001 - CONTROL NUMBER |
|---|
| control field |
29695 |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20230423231327.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
s2006 xxum b a000 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
0534551610 (hbk.) |
| 049 ## - LOCAL HOLDINGS (OCLC) |
|---|
| -- |
PITLIB |
| 050 00 - LIBRARY OF CONGRESS CALL NUMBER |
|---|
| Classification number |
TK7868.L6 |
| Item number |
L481 |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| Personal name |
Lee, Sunggu. |
| 9 (RLIN) |
38810 |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Advanced digital logic design : |
| Remainder of title |
using Verilog, state machines, and synthesis for FPGAs / |
| Statement of responsibility, etc. |
Sunggu Lee |
| Medium |
[book] |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
Toronto, Ont. : |
| Name of publisher, distributor, etc. |
Thomson, |
| Date of publication, distribution, etc. |
c2006. |
| -- |
2050 |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
462 p. : |
| Other physical details |
ill. |
| 449 #0 - |
|---|
| -- |
•v004– New Arrivals- Sep. 2013 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Logic design |
| General subdivision |
Data processing |
| 9 (RLIN) |
38807 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Digital electronics |
| 9 (RLIN) |
38811 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Verilog (Computer hardware description language) |
| 9 (RLIN) |
38809 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Sequential machine theory |
| 9 (RLIN) |
38812 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Application-specific integrated circuits |
| 9 (RLIN) |
38813 |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Logic design |
| General subdivision |
Data processing |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Verilog (Computer hardware description language) |
| 690 #0 - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) |
|---|
| Topical term or geographic name as entry element |
0021 วิทยาศาสตร์บัณฑิต สาขาเทคโนโลยีสารสนเทศ IT (ป.ตรี) |
| 9 (RLIN) |
64 |
| 690 #0 - LOCAL SUBJECT ADDED ENTRY--TOPICAL TERM (OCLC, RLIN) |
|---|
| Topical term or geographic name as entry element |
0023 วิศวกรรมศาสตรบัณฑิต สาขาวิศวกรรมคอมพิวเตอร์ CPE (ป.ตรี) |
| 9 (RLIN) |
65 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Koha item type |
หนังสือ |
| 970 ## - |
|---|
| -- |
1. |
| -- |
Condensed overview of introductory digital logic design |
| -- |
p. 1 |
| 970 ## - |
|---|
| -- |
2. |
| -- |
Digital logic design using hardware description languages |
| -- |
p. 30 |
| 970 ## - |
|---|
| -- |
3. |
| -- |
introduction to verilog and test benches |
| -- |
p. 45 |
| 970 ## - |
|---|
| -- |
4. |
| -- |
High-level verilog coding for synthesis |
| -- |
p. 111 |
| 970 ## - |
|---|
| -- |
5. |
| -- |
State machine design |
| -- |
p. 155 |
| 970 ## - |
|---|
| -- |
6. |
| -- |
FPGA and other programmable logic devices |
| -- |
p. 203 |
| 970 ## - |
|---|
| -- |
7. |
| -- |
Design of a USB photocol analyzer |
| -- |
p. 233 |
| 970 ## - |
|---|
| -- |
8. |
| -- |
Design of fast arithmetic units |
| -- |
p. 299 |
| 970 ## - |
|---|
| -- |
9. |
| -- |
Design of a pipelined RISC microprocessor |
| -- |
p. 338 |
| 970 ## - |
|---|
| -- |
8. |
| -- |
Answers to selected problems |
| -- |
p. 408 |
| 988 ## - |
|---|
| -- |
29695 |
